Energy-efficient fault-tolerant scheduling techniques for dependable real-time systems.

In a dependable real-time system including microprocessors, memory and I/O devices, microprocessors can be used by Dynamic Voltage/Frequency Scaling (DVFS) to reduce energy consumption. Introduction of fault-tolerance schemes render such technique unsuitable since fault-tolerant schedules have several unique characteristics. My research makes the following contributions: (1) The investigation of the feasibility of task-set schedule on a multi-processor system under the impact of fault; (2) The investigation of minimizing processor energy consumption under the impact of fault for uni-processor system; (3) The investigation of minimizing processor energy consumption under the impact of fault for multi-processor system. Based on the first investigation, I propose a methodology to investigate the design of energy-efficient and reliable real-time systems. Based on the second and third investigation, an innovative algorithm to convert system reliability requirements to fault tolerance requirements is proposed. I also propose a heuristic algorithm to find a close-to-optimal frequency policy in polynomial time. Experimental results show that the results obtained by the proposed algorithm are within 4% difference from the optimal results obtained by solving the ILP formulation.