FPGA Task Arrangement with Genetic Algorithms Buy on Amazon

https://www.ebooknetworking.net/books_detail-3838622995.html

FPGA Task Arrangement with Genetic Algorithms

47.50 59.90 USD
Buy New on Amazon 🇺🇸

Usually ships in 24 hours

Book Details

ISBN / ASIN3838622995
ISBN-139783838622996
AvailabilityUsually ships in 24 hours
MarketplaceUnited States  🇺🇸

Description

Diplomarbeit, die am 31.07.1999 erfolgreich an einer Technische Universität in Deutschland im Fachbereich Informatik eingereicht wurde. Abstract: Two evolutionary approaches of allocating tasks onto a Field-Programmable Gate Array (FPGA) are presented. Offline task arrangement: whenever a set of tasks has to be arranged onto an FPGA in practice, one is interested in arranging a maximum number of tasks which efficiently utilize the FPGA area. A genetic algorithm is proposed searching for an arrangement of tasks offline, i.e. before the tasks are physically placed onto the FPGA. Online task arrangement: FPGAs that allow partial reconfiguration at run-time can be shared among multiple independent tasks. When the sequence of tasks to be performed is unpredictable the FPGA controller needs to make allocation decisions online. Since online allocation suffers from fragmentation, tasks can end up waiting despite there being sufficient, albeit non-contiguous resources available to service them. The time to complete tasks is consequently longer and the utilization of the FPGA is lower than it could be. A genetic algorithm is proposed rearranging a subset of the tasks executing on the FPGA when doing so allows the next pending task to be processed sooner. In comparison with other heuristic approaches a genetic algorithm is described and evaluated which overcomes the NP-hard problems of identifying feasible rearrangements and scheduling the rearrangements when moving tasks are reloaded from off-chip. Table of Contents: 1.|Introduction|7 2.|Field Programmable Gate Arrays|9 2.1|Architecture of FPGAs|9 2.2|Dynamically Reconfigurable FPGAs|10 2.3|Comparison with Related Devices|11 2.4|Creation of an FPGA Model|11 3.|FPGA Task Arrangement Problem|18 3.1|Static Task Arrangement Problem|18 3.1.1|Static Task Management|18 3.1.2|Problem Formulation|20 3.2|Dynamic Task Arrangement Problem|21 3.2.1|Dynamic Task Management|21 3.2.2|Search for an Admissi
Donate to EbookNetworking
Prev
Next