CMOS Digital Integrated Circuit Design (MTech VLSI)

MOS Design: Pseudo NMOS Logic - Inverter, Inverter threshold voltage, Output high voltage, Output Low voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS logic gates, Transistor equivalency, CMOS Inverter logic. UNIT -II: Combinational MOS Logic Circuits: MOS logic circuits with NMOS loads, Primitive CMOS logic gates - NOR & NAND gate, Complex Logic circuits design - Realizing Boolean expressions using NMOS gates and CMOS gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with Transmission gates. UNIT -III: Sequential MOS Logic Circuits: Behavior of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch and edge triggered flipflop. UNIT -IV: Dynamic Logic Circuits: Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic CMOS transmission gate logic, High performance Dynamic CMOS circuits. UNIT -V: Semiconductor Memories: Types, RAM array organization, DRAM - Types, Operation, Leakage currents in DRAM cell and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR flash and NAND flash.