{"version":"1.0","type":"rich","provider_name":"EbookNetworking","provider_url":"https://www.ebooknetworking.net","title":"Jitter reduction circuits to reduce the bit-error rate of high-speed serializer-deserializer (SERDES) circuits.","author_name":"Hari Vijay Venkatanarayanan","thumbnail_url":"https://www.ebooknetworking.net/books/124/402/big1244023612.jpg","thumbnail_width":330,"thumbnail_height":500,"html":"<a href=\"https://www.ebooknetworking.net/books_detail-1244023612.html\">Jitter reduction circuits to reduce the bit-error rate of high-speed serializer-deserializer (SERDES) circuits.</a>","width":400,"height":300}