{"version":"1.0","type":"rich","provider_name":"EbookNetworking","provider_url":"https://www.ebooknetworking.net","title":"Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits","author_name":"Subhadip Kundu, Santanu Chattopadhyay","thumbnail_url":"https://www.ebooknetworking.net/books/365/925/big3659255203.jpg","thumbnail_width":330,"thumbnail_height":500,"html":"<a href=\"https://www.ebooknetworking.net/books_detail-3659255203.html\">Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits</a>","width":400,"height":300}