The Design and Implementation of Low-Power CMOS Radio Receivers

It is hardly a profound observation to note that we remain in the midst of a wireless revolution. In 1998 alone, over 150 million cell phones were sold worldwide, representing an astonishing 50% increase over the previous year. Maintaining such a remarkable growth rate requires constant innovation to decrease cost while increasing performance and functionality. Traditionally, wireless products have depended on a mixture of semicond- tor technologies, spanning GaAs, bipolar and BiCMOS, just to name a few. A question that has been hotly debated is whether CMOS could ever be suitable for RF applications. However, given the acknowledged inferiority of CMOS transistors relative to those in other candidate technologies, it has been argued by many that “CMOS RF” is an oxymoron, an endeavor best left cloistered in the ivory towers of academia. In rebuttal, there are several compelling reasons to consider CMOS for wi- less applications. Aside from the exponential device and density improvements delivered regularly by Moore’s law, only CMOS offers a technology path for integrating RF and digital elements, potentially leading to exceptionally c- pact and low-cost devices. To enable this achievement, several thorny issues need to be resolved. Among these are the problem of poor passive com- nents, broadband noise in MOSFETs, and phase noise in oscillators made with CMOS. Beyond the component level, there is also the important question of whether there are different architectural choices that one would make if CMOS were used, given the different constraints.