Development of 3+2 dynamic drive scheme for cholesteric liquid crystal displays [An article from: Displays]
Book Details
Author(s)N.S. Lee, W.S. Choi
PublisherElsevier
ISBN / ASINB000RR32KG
ISBN-13978B000RR32K1
AvailabilityAvailable for download now
Sales Rank99,999,999
MarketplaceUnited States 🇺🇸
Description
This digital document is a journal article from Displays, published by Elsevier in 2004. The article is delivered in HTML format and is available in your Amazon.com Media Library immediately after purchase. You can view it with any web browser.
Description:
In order to achieve fast driving for reflective cholesteric liquid crystal display (Ch-LCD) we have developed a novel 3+2 dynamic driving scheme (3+2 DDS), which uses 3 and 2 level driver ICs for row and columns, respectively. From the transient dielectric study, the selection period of around 1.0ms/line showed the best contrast ratio at 30^oC in our system. The time of the homeotropic to transient planar state is strongly dependent on temperatures. The row driver IC has 3 level outputs of R"H, R"M (R"H/2), and R"L; 32, 16, and 0V, respectively. And the outputs of the column driver IC are composed of 2 levels. We found that a preparation period of more than 40 times and an evolution period of around 40 times of the selection period are suitable. Also, we have accomplished a stable gray scale by using, as we call it, the pulse position modulation (PPM) in which the root mean square (RMS) value of the applied field during the evolution period does not change, even under cross-talk pulses. The driving condition made by PPM is more stable than that made by the usual PHM and PWM techniques. By adopting the 3+2 DDS, we have made 8.4in. foldable VGA Ch-LCD (640x480x2) that shows an addressing speed of around 1.0ms/line.
Description:
In order to achieve fast driving for reflective cholesteric liquid crystal display (Ch-LCD) we have developed a novel 3+2 dynamic driving scheme (3+2 DDS), which uses 3 and 2 level driver ICs for row and columns, respectively. From the transient dielectric study, the selection period of around 1.0ms/line showed the best contrast ratio at 30^oC in our system. The time of the homeotropic to transient planar state is strongly dependent on temperatures. The row driver IC has 3 level outputs of R"H, R"M (R"H/2), and R"L; 32, 16, and 0V, respectively. And the outputs of the column driver IC are composed of 2 levels. We found that a preparation period of more than 40 times and an evolution period of around 40 times of the selection period are suitable. Also, we have accomplished a stable gray scale by using, as we call it, the pulse position modulation (PPM) in which the root mean square (RMS) value of the applied field during the evolution period does not change, even under cross-talk pulses. The driving condition made by PPM is more stable than that made by the usual PHM and PWM techniques. By adopting the 3+2 DDS, we have made 8.4in. foldable VGA Ch-LCD (640x480x2) that shows an addressing speed of around 1.0ms/line.
