Optimization of test scheduling and test access for ITC-02 SOC benchmark circuits.(system-on-chip)(Technical report): An article from: Journal of Computer Science

This digital document is an article from Journal of Computer Science, published by Science Publications on April 1, 2009. The length of the article is 4720 words. The page length shown above is based on a typical 300-word page. The article is delivered in HTML format and is available immediately after purchase. You can view it with any web browser.

From the author: Key words: System-on-chip, test scheduling, test access mechanism, integer linear programming, genetic algorithm, test wrapper

Citation Details
Title: Optimization of test scheduling and test access for ITC-02 SOC benchmark circuits.(system-on-chip)(Technical report)
Author: P. Sakthivel
Publication:Journal of Computer Science (Magazine/Journal)
Date: April 1, 2009
Publisher: Science Publications
Volume: 5 Issue: 4 Page: 290(7)

Article Type: Technical report

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